1. Field of the Invention
Embodiments of the invention relate to the field of semiconductor, and more specifically, to semiconductor fabrication.
2. Description of Related Art
Metal interconnects are used to connect various elements in a semiconductor die. The interconnects provide electrically conducting paths to carry currents or provide power for various devices or circuits. Within an integrated circuit die, metal layers are stacked on top of one another by using dielectrics that insulate the metal layers from each other. Typically, each metal layer may form electrical contact to an additional metal layer through holes or vias filled with a metal. When interconnects are used to connect components external to a die such as sensors or thermoelectric coolers (TECs), the fabrication of the metal interconnects to provide power to these components may require complex patterning or etching processes and may require large real estate on the die.
Redistribution layer (RDL) is a technique to reduce the space required for interconnecting patterns. In an RDL, an additional level of wiring repositions the bond pads of the semiconductor die. This technique typically used sputtering or plating which requires the photo sensitive mask process to pattern the metal layers or the interconnects structure. This technique may be complex, expensive, and inflexible.